AI systems15 min read

Intel AMX: Understanding CPU-Based Matrix Acceleration

AMX is hardware in Intel CPUs that multiplies blocks of numbers at once, so you can run AI faster without a graphics card.

Intel AMXCPUMatrix ComputationoneDNNBF16AVX-512

Dedicated GPUs get most of the attention for AI speed. Intel Advanced Matrix Extensions (AMX) offer another option. AMX puts matrix multiplication hardware inside the CPU. You can run AI workloads faster without a graphics card.

Each topic in this post has two parts. The first part uses a simple example. The second part gives the technical details. You can read the topics in any order.

What AMX is

// LAYMAN UNDERSTANDING

The simple explanation

Think of a grocery list. A traditional CPU adds the items one by one: apples, then oranges, then bread, then milk. This works, but it is slow.

AMX is like a calculator that adds the whole shopping cart at one time.

An AI model is a large set of multiplications and additions. AMX is hardware in newer Intel CPUs. It does many of these calculations at the same time. AI programs run faster, and you do not need a graphics card.

Illustration

Cooking example: one ingredient at a time, or all ingredients in one pot

👨‍🍳Traditional CPU
Chop onions
Then carrots
Then potatoes
Then meat...

One thing at a time is slow

🍳AMX CPU
🧅🥕🥔🥩

All at once in one pot

Everything together is fast

A traditional CPU processes numbers one by one. It is like a chef who cooks each ingredient alone.

// TECHNICAL DETAILS

How AMX works

AMX uses tile-based matrix operations. A vector is a one-dimensional array of numbers. AMX does not work on vectors. It works on tiles. A tile is a two-dimensional block of a matrix. Each tile fits in a dedicated tile register.

The TMUL (Tile Matrix Multiply) unit does the math. TMUL is hardware made only for matrix operations. One TDPBF16PS instruction multiplies two full tiles. Without AMX, the CPU needs hundreds of traditional instructions for the same work.

Illustration

AMX tiles: the CPU loads matrices into tile registers

Tile A
×
Tile B
=
Result
Load Tile A

The BF16 matrix goes into a tile register

Key instruction: TDPBF16PS. It multiplies tiles of BF16 values and adds the results in single precision.

BF16 number format

// LAYMAN UNDERSTANDING

Why fewer bits can help

When you work out a tip at a restaurant, you do not need 15 decimal places. You round to the nearest cent.

BF16 (Brain Float 16) works the same way for AI. A traditional computer uses 32 bits to store a number. This gives very high precision. AI does not need that much detail. BF16 uses 16 bits, which is half the space. AI keeps enough accuracy to work correctly. The CPU moves less data, so it processes the data faster.

Illustration

BF16 is like shorthand: faster to write, with the same meaning

Full Precision (FP32)
3.14159265358979...
📝Like writing every decimal place

More detail, but slower

Brain Float 16 (BF16)
3.14
⚡Enough precision for AI

Enough precision, and faster

Full precision is exact, but it takes longer to process.

// TECHNICAL DETAILS

Native BF16 in hardware

AMX processes BF16 natively in hardware. Without AMX, the CPU must emulate BF16. It converts BF16 to FP32, does the math, and converts the result back to BF16. This conversion removes the memory benefit of BF16.

With AMX, the data stays in BF16 for the whole computation. The TMUL unit multiplies and adds BF16 values directly. There is no conversion delay. The CPU makes full use of the memory bandwidth.

Illustration

Without AMX, BF16 needs a conversion. With AMX, the CPU uses BF16 directly.

Without AMX (software emulation)
BF16
Input Data
↓ Convert to FP32 (extra work) ↓
FP32
Compute (2x memory)
↓ Convert back to BF16 ↓
BF16
Output
With AMX (native in hardware)
BF16
Input Data
BF16
Native BF16 Compute (TMUL)
BF16
Direct Output
No conversion, so no extra work

Running many tasks

// LAYMAN UNDERSTANDING

The assembly line idea

Think of a car factory. If one worker builds a whole car alone, it takes a long time. On an assembly line, many workers build different cars at the same time. The factory makes more cars each hour.

Python is the language that most AI programs use. Python has a limit: only one thing can run at a time. It is like an assembly line where only one worker can move at a time.

AsyncInferQueue removes this limit. It moves the work to a separate factory floor. Many workers can work there at the same time, outside the Python limit.

Illustration

AsyncInferQueue: like many workers on an assembly line

💤W1
💤W2
💤W3
💤W4
💤W5
💤W6
📦Tasks arrive
→
⚡Workers run tasks in parallel
→
✅Results are collected

More workers finish more tasks at the same time.

// TECHNICAL DETAILS

How to avoid the Python GIL

The Python Global Interpreter Lock (GIL) stops Python from running threads in parallel. For AI inference, this is a bottleneck. Inference is the step where a trained model makes a prediction. With the GIL, Python can process only one request at a time, even on fast AMX hardware.

AsyncInferQueue from OpenVINO manages the requests at the C++ level. The inference runs in parallel threads outside the control of Python. This keeps the AMX hardware fully busy.

Illustration

OpenVINO AsyncInferQueue: parallel inference slots run outside the Python GIL

Active: 0 / Available: 8

Many inference requests run in parallel at the C++ level. The Python GIL does not limit them.

Python GIL (Global Interpreter Lock): it stops Python from running threads in parallel
AsyncInferQueue runs the work at the C++ level, outside the GIL

# Create queue with multiple parallel inference slots
async_queue = AsyncInferQueue(compiled_model, jobs=16)

# Submit requests (non-blocking, GIL released)
for frame in preprocessed_frames:
    async_queue.start_async({0: frame})

# Wait for all completions
async_queue.wait_all()

The oneDNN library

// LAYMAN UNDERSTANDING

Automatic optimization

You do not need to know how a car engine works to drive a car. In the same way, you do not need to know your CPU to use oneDNN. oneDNN is a software library from Intel. It uses the best CPU features that are available.

When you run an AI model, oneDNN checks which features your CPU has. It then picks the fastest method. It is like a GPS that picks the fastest route for the traffic now. You say where to go, and it does the rest.

Illustration

oneDNN picks the best tool from the toolbox of your CPU

🔧

AMX

Best tool: handles whole tiles

🔨

AVX-512 VNNI

Good for set patterns

🪛

AVX-512

General use, wide vectors

🔩

AVX2

Basic and reliable

oneDNN (an Intel library) selects:AMX

// TECHNICAL DETAILS

Instruction set levels

oneDNN hides the hardware details from you. When it compiles an operation, it asks the CPU which ISAs (Instruction Set Architectures) it supports. It then picks the best implementation.

The ONEDNN_MAX_CPU_ISA environment variable lets you set the limit yourself:

# Enable all instructions including AMX
export ONEDNN_MAX_CPU_ISA=DEFAULT

# Disable AMX, use only AVX-512
export ONEDNN_MAX_CPU_ISA=AVX512_CORE_VNNI

# Fallback to basic AVX2
export ONEDNN_MAX_CPU_ISA=AVX2
Illustration

ONEDNN_MAX_CPU_ISA sets which instruction sets the CPU can use

◆
AMX-BF16

Tile matrix operations

▲
AVX-512 VNNI

Vector neural network instructions

●
AVX-512

Wide vector processing

■
AVX2

Standard vector instructions

Hover to see how ONEDNN_MAX_CPU_ISA limits the instruction sets

Key points

These are the four main points of this post:

  1. AMX processes blocks of a matrix, not single numbers. This design lets AI workloads run many operations in parallel.
  2. AMX uses BF16 natively. There is no conversion, so the CPU uses the full memory bandwidth.
  3. AsyncInferQueue gives true parallelism. You must avoid the Python GIL to keep AMX fully busy.
  4. oneDNN does the hard work for you. Frameworks use the best instructions without manual setup.
AMX makes modern Intel CPUs good tools for AI inference. It does not replace GPUs for training. It does change the cost of AI inference on CPUs.

If you run AI workloads on Intel hardware, AMX can give you better performance. You do not need to change your infrastructure.

Signup for Updates:

I promise to only email you cool shit. Draft chapters, progress updates, sneak peaks at illustrations I'm working on. Stuff like that.

░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░░